A DRAM is a memory element which typically holds and supplies information for use by electronic computing and logic elements, such as microcontrollers, microprocessors, logic arrays, and the like. In a computer system, the DRAM delivers information to, and receives information from, a processor, typically a microprocessor, over electrical conductors of a system bus. The information stored in the DRAM is used by the microprocessor for computation and control.
The typical DRAM comprises thousands of individual memory cells arranged in a matrix-like configuration and control logic for controlling the memory operations. The cells of the matrix are addressed by address signals generated by the microprocessor and supplied on word lines, and by signals sensed or read from, or by signals selectively supplied or written on, selectively-addressed bit lines. The word lines extend along horizontal rows of cells and intersect vertical columns of cells in the matrix. The bit lines extend along vertical columns of cells and intersect horizontal rows of cells in the matrix. In concept, by energizing a selected word line and reading or writing only on selected bit lines, individual cells at the intersections of the selected word and bit lines are written or read. In this manner, unique memory "addresses" represent specific word line and bit line combinations which access the information located at the cells identified by the address. Memory cell control and data address signals are generated by the microprocessor.
Control logic of the memory performs the read and write operations on the DRAM memory cells. The control logic receives control signals from the microprocessor requesting a read or write operation, and receives address signals indicating the memory cell addresses where the read or write operation is to be performed. The control logic then carries out the read or write operation. For a write operation, the microprocessor also provides the data to be stored in the addressed memory cells. For a read operation the data obtained from the addressed DRAM cells is supplied to the microprocessor.
The microprocessor based system may be a general purpose computer system or may be an application-specific integrated circuit (ASIC) or a system-level integrated circuit (SLIC). An ASIC or a SLIC is a single IC which includes a combination of various electronic components, such as microcontrollers, microprocessors, logic gates, registers, amplifiers and the like, all of which have been selected, connected and integrated together to perform specific functions for a specific application. Examples of SLICs are controllers for computer memory disc drives, graphics controllers, LAN switches, fuel injector control systems for internal combustion engines, global positioning systems, and control devices for a wide variety of consumer products, among many other things. SLICs are desirable for use in mass produced products because of the enormous amount of functionality which can be created at a very low effective cost. These types of SLICs are sometimes referred to as a "system on a chip," because of the complete functionality obtained from the single chip or IC.
DRAMs have only recently been incorporated as part of SLICs. Previously, when the SLIC required memory to function, separate memories or DRAM chips were provided on a printed circuit board. Embedding DRAM in a SLIC avoids the additional cost of a separate memory chip. Avoiding the cost of the separate DRAM chip is attractive because separate DRAM chips are relatively costly and of considerable memory size. The embedded DRAM portion of the SLIC usually represents a relatively small portion of the overall size of the typical SLIC. If this were not the case, it would be more cost effective to use a separate DRAM chip in combination with the SLIC.
Typically a SLIC manufacturer will have a "library" of standard component designs which can be incorporated together in creating the SLIC, because of the wide variety of different circuitry which may be required in different SLICs. The standard library designs will include, for example, arrays of logic gates, microprocessors, DRAMs and the like. The cost effectiveness of competing in the SLIC fabrication market depends on the ability to integrate the standard library designs together in creating the SLIC, without specifically having to redesign each component each time it is used in a different SLIC. In the case of a memory, each SLIC may require a different amount of memory. Therefore, to avoid specifically designing a memory for each different SLIC, the memory design should accommodate different sizes without redesign of the memory functional components.
Generally, successfully integrating different standard designs will require the ability to physically reposition the standard components on the chip to accommodate differing customer requirements for the SLIC. The cost of an integrated circuit such as a SLIC is directly dependent upon the amount of area consumed by the circuit elements, and not necessarily related to the complexity or amount of circuitry on the chip. Thus, every effort is made to efficiently use all of the available space on the chip to keep the cost of the SLIC as low as possible.
Laying out or configuring the DRAM array on a SLIC chip may require that the regular rectangular matrix-like array of memory cells be altered to accommodate the irregular areas of available space. The regular repetitive nature of the matrix of memory cells makes the DRAM memory array theoretically attractive to break into portions and distribute the portions in spaces not occupied by other SLIC components. However, even changing the regular, repetitive nature of a DRAM memory configuration may introduce unintended errors. Correcting the errors may add considerable cost to the SLIC.
In addition to the physical constraints of integrating a DRAM memory array into a SLIC, there are many different functional requirements which also must be accommodated among various different SLICs that may be fabricated. For example, in some SLICs of modest functionality, the bit width of words communicated on the system bus may be 8 or 16 bits. On more sophisticated or high-performance systems, the bit width may be 32, 64 or 128 bits. Since the basic memory cell aspects of the DRAM will be the same in all types of systems, additional component features must be incorporated to adapt the standard DRAM memory cells to accommodate a variety of different functional requirements. These additional component features may require additional space to integrate into the SLIC, may increase the number of standard designs in the design library, may increase the cost of fabricating the chip because the cost of the additional designs must be accounted for and because extra space may be consumed by the additional designs, and may increase the risks of design and fabrication errors when the SLIC is fabricated.
It is with respect to these and other considerations relating to creating DRAM memory arrays embedded in SLICs that the present invention has evolved.